Semiconductors & Integrated Circuits : Components & materials

Semiconductors & Integrated Circuits Portfolios


Real-Time Monitoring of Sputtered Thin Films

UW–Madison researchers have developed methods that combine off-axis sputter deposition with in situ RHEED analysis. Using a new multi-gun approach, films are grown and monitored in a single vacuum chamber that houses components of both systems. In this setup the sputtering magnets are used to align the RHEED electron beam. The problem of beam deflection is addressed by applying antisymmetric magnet configurations to the assembly, resulting in a highly predictable bending of the beam.

New Biodegradable Integrated Circuits Signal the Future of E-Waste Management

UW–Madison researchers have developed substantially biodegradable microwave integrated circuits and methods for their manufacture.

The circuits utilize cellulose nanofibril (CNF) thin-film paper rather than GaAs (a toxic semiconductor) as their principle substrate, minimizing amounts of potentially toxic inorganic materials. The CNF, which is derived from wood, is coated with a hydrophobic polymer to resist water and solvents while remaining readily degradable by common forest fungi.

Key electrical components, including a group III-V semiconductor, are formed on a standard substrate, which can be reused, and then transferred to the flexible, transparent and biodegradable CNF paper. The resulting circuits substantially reduce the levels of toxic materials introduced into the environment when they are discarded.

Improved Nanotube Film for Field Effect Transistors and More

UW–Madison researchers have developed a more stable method to make high density s-SWCNT film with good nanotube alignment. The film can be incorporated in state-of-the-art FETs and other devices.

The new method is called continuous floating evaporative self-assembly (continuous FESA). In the process, a steady supply of s-SWCNT ‘ink’ (rather than small droplets) is applied over a partially submerged support layer, where it will form into film. This process avoids the surface tension problems associated with droplets.

Buffer Layer for Growing High Quality Semiconductors

A UW–Madison researcher has developed a method for forming a layer of mixed metal oxide epitaxial film (e.g., ScAlMgO4) on a sapphire semiconductor substrate. This layer provides a better lattice match than the uncoated sapphire substrate.

The mixed metal oxide layer is formed on the substrate via atomic layer deposition (ALD) and then annealed at a high temperature long enough to turn it into epitaxial film. The buffered substrate may then be used to grow a semiconductor.

Boron-Doped Diamond for Next Generation Power Electronics

UW–Madison researchers have developed a method to make boron-doped diamond via low-temperature thermal diffusion. The diamond material may be single crystalline, natural or type IIa.

In the process, an ultrathin boron-doped silicon nanomembrane is bonded to the surface of the diamond and annealed at a temperature around 800 degrees Celsius. Given enough time, the boron atoms from the nanomembrane diffuse into the diamond layer to form a doped region.

Graphene Nanoribbons with Ultrasmooth Edges

UW–Madison researchers have developed a new bottom-up technique for growing graphene nanoribbons with nearly atomically smooth armchair edges directly on germanium, a conventional semiconductor material. The nanoribbons are grown via chemical vapor deposition (CVD) from a mixture of common gases. The process yields aligned nanoribbons with very low edge roughness (< 1 nm), tunable widths to < 5 nm, and lengths of hundreds of nanometers.

The nanoribbon arrays can be released from the germanium and transferred to a second arbitrary substrate to fabricate a variety of semiconductor devices.

Thinner Reflector Stacks for Vertical-Cavity Surface-Emitting Lasers

UW–Madison researchers have developed a method to create ultrathin DBRs that can be used in VCSELs. The DBRs are made of alternating layers of single-crystalline Group IV semiconductors (e.g., silicon or germanium) and silicon dioxide. The single-crystalline layers are incorporated into the stack using a thin film transfer and bonding process, while the silicon dioxide layers can be thermally grown or deposited.

The process results in very thin DBRs that can provide extremely high reflectance.

Superior Nanotube Film for High Performance Field Effect Transistors

UW–Madison researchers have developed a method to make high density s-SWCNT film having good nanotube alignment. The film can be incorporated in high performance FETs.

The film is made using a method called dose-controlled, floating evaporative self-assembly. This method uses a thin layer of organic solvent containing solubilized s-SWCNTs that is spread over the surface of an aqueous medium, inducing evaporative self-assembly upon contact with a solid substrate.

The s-SWCNTs are applied in controlled ‘doses,’ which allows for the rapid sequential deposition of narrow films or ‘stripes’ with continuous control over width, density and periodicity. For this reason they are well suited for use as channel materials in FETs having high on-conductance values and high on/off ratios.

Zinc Oxide Thin Films Have Higher Electron Mobility

UW–Madison researchers have developed a room-temperature, solution-based surface treatment that improves the properties of zinc oxide film. The treatment uses molecules that bind to the film’s surface to increase electron mobility and conductivity.

In the process, a nanometer-thick film of polycrystalline zinc oxide or an alloy is disposed over a supporting substrate and a layer of organic carboxylic acid-containing molecules. The molecules can be derivatives of saturated fatty acids or photosensitizing dye. They bind to the surface of the film via their linkage groups.

The process is compatible with techniques for manufacturing large area electronics on flexible substrates.

Stretchable Transistors Using Carbon Nanotube Film

UW–Madison researchers have developed a method of fabricating stretchable transistors with buckled carbon nanotube film as the conductive channel. The new process is much simpler than existing techniques and does not involve complicated lithography.

First, a thin film of single-walled carbon nanotubes (SWCNTs) is applied onto the surface of an elastic substrate, then repeatedly stretched and relaxed, causing the film to buckle. Layers of electrically conducting material are then deposited to form source and drain electrodes. Finally, a stretchable material such as ion gel is deposited to form a gate dielectric between the two electrodes.

Reusable Virtual Substrates for Growing Semiconductor Devices

UW–Madison researchers have developed improved virtual substrates using hydride vapor phase epitaxy (HVPE). HVPE is a well-known technique that enables thick layers of semiconductor to be grown in short periods of time.

The virtual substrates comprise several layers. The underlying GaAs substrate has a certain lattice constant. Over this, an MBL is grown via the HVPE process. The MBL is sufficiently thick to avoid warping. It is compositionally graded so that its lattice constant matches the underlying substrate, but transitions to a different lattice constant at its surface where the semiconductor device will be grown.

The MBL surface can be polished and reused to grow multiple semiconductor devices.

Semiconductor Interconnect Design for Small, Inexpensive, Integrated Current Sensing with Improved Reliability

UW–Madison researchers have developed a design for integrated current sensing that is comprised of semiconductor interconnects with a loop configuration, instead of a straight bar, and point magnetic field detectors specially located to detect current flowing in the interconnect from DC to high frequency (MHz). Giant magnetoresistive (GMR) detectors serve as these point-field detectors.

Rapid, Controlled Growth of Doped Gallium Arsenide for Solar Cells

UW–Madison researchers have developed a new method for growing layers of carbon-doped GaAs using a haloalkane dopant and HVPE.

First, a substrate is exposed to a gas mixture composed of gallium, arsenic and a haloalkane dopant. Conditions in the reactor, including gas flow rate, growth temperature and timing, are controlled to grow layers of carbon-doped GaAs on the substrate via HVPE, and are adjustable to maximize dopant concentrations.

The process may be repeated to deposit additional layers. Also, a variety of haloalkanes based on bromine, chlorine and iodine can act as dopant. Using the new method, the concentration of carbon within the layer can be monitored and altered as needed.

Realizing Highly Uniform Thin Films of Complex Oxides by Off-Axis Sputtering

A UW–Madison researcher has developed an off-axis sputtering apparatus and technique to fabricate oxide layers of substantially uniform thickness at high deposition rates and over large areas.

The process involves depositing a thin oxide film on a rotating substrate (of glass or other suitable material) contained within a sputtering apparatus. Sputtering guns face the substrate, parallel but offset by 90 degrees from it, and direct gaseous oxide material onto its surface when a magnetic field is applied. Single layers or lattices of multiple chemical compositions can be grown in this way.

Particularly well-suited to the method are piezoelectric materials like PMN-PT, oxides composed of six or more elements and materials that contain volatile components like lead and bismuth and exhibit severe backsputtering.

Improved Method for Making Thin Layers of Crystalline Materials

UW–Madison researchers have developed a method for making templates for the epitaxial growth of compound semiconductors and other materials. The method comprises growing a layer of coherently strained single-crystalline material over a layer of sacrificial material, selectively removing the one or more suspended sections of the layer of sacrificial material and detaching the one or more elastically relaxed portions of the layer of single-crystalline material from the remainder of the layer of single-crystalline material. The semiconductor alloy described is Si1-xGex, where x is at least 0.2.

Large-Area, Nanoperforated Graphene Materials for Semiconducting Applications

UW–Madison researchers have developed methods to fabricate nanoperforated graphene by etching periodic arrays of nanoscale holes into graphene sheets. The features of the periodic array of holes, including diameter, spacing and constrictions between holes, can be fabricated with dimensions smaller than 20 nm and are designed to provide an electronic band gap of at least 100 meV.

The methods comprise forming an etch mask that defines a periodic array of holes over single or multiple layers of graphene material that has been grown or deposited onto a support material. A perforated structure is formed by depositing and patterning the masking layer onto the graphene via a pattern-defining block copolymer, which may also include a wetting and a neutral layer. Once patterned, the graphene is etched to form interconnected graphene strips that behave as semiconductors with a sufficient band gap. The method provides control over the size and pattern of the holes, which allows the material to be tailored for specific material properties and applications.

Antenna-Based Power Generation with Nanoscale Rectifying Elements

UW-Madison researchers have developed a new power generation structure based on the quantum mechanics of nanostructures. A coupled pair of nanopillars serves as the rectifier in a rectenna for power generation. The rectified electromagnetic signal is used to transfer electrons, which leads to the buildup of voltage. Embedding these nanoscale rectifiers in broadband antennas creates rectennas with the ability to scavenge energy from the radio frequency to optical frequency range. Rectennas with nanoscale power generation devices have the potential to be used as a universal power source.

Thin Metal Oxide Films for Transparent and Flexible Electronics

UW-Madison researchers have developed a continuous, free-standing metal oxide film and a method of making such films. The method produces zinc oxide nanomembranes with large areas through film synthesis on a water surface. A wetting agent forms a planar template on the water surface and attracts zinc cations contained in the water to the surface. The template expands over the water surface during formation and results in growth of a large zinc oxide membrane. The membrane floats on the water surface and can be transferred easily onto a variety of substrates, allowing for use in a variety of applications. The single-crystalline structure of the continuous metal oxide film aligns either in a hexagonal or rectangular pattern depending on temperature and growth time. The single-crystalline structure provides the desirable semiconducting properties unavailable in current polycrystalline metal oxide films.

Improved High-Power Transistor Amplifier for Wireless Communications

UW-Madison researchers have optimized a high-power amplifier utilizing HBTs with a CB configuration to provide significant improvements in gain and power handling capacity. Although it is widely believed that CB and CE HBT amplifiers should provide identical power, the inventors determined that the power handling capabilities for HBTs are significantly affected by whether they are used in a CB or CE configuration. In voltage source biasing configurations, CE amplifiers provide higher output power than CB configurations. However, if an active current source biasing is used to bias the output of the amplifier, CB amplifiers will outperform CE amplifier configurations using identical parameters.

By taking advantage of the difference between CB and CE configurations, this method provides an increase in power handling for HBT transistor amplifiers without changing the HBT device and most significantly, without increasing the area of the device. In comparison to voltage source biasing configurations, the current source biasing arrangement allows the application of higher voltages since it is not limited by breakdown voltage. The ability to apply higher voltages further expands the opportunities with this new amplifier design, such as an increase in the amplifier gain for improved receiver applications. The amplifier seamlessly integrates with voltage source biasing systems by making the current source bias conversion within the amplifier itself. This improvement in power handling capacity will have a substantial influence on the manufacture and miniaturization of RF amplifiers.

Nano-Mechanical Computer Based on Nano-Electro-Mechanical Transistors

UW-Madison researchers have developed a robust alternative to conventional transistors: a nano-electro-mechanical transistor based on the nano-electro-mechanical single electron transistor (NEMSET). These nanoscale switching elements may be interconnected in the same way as conventional circuits to create a nano-mechanical computer with the benefits of NEMSET. However, they offer the benefit of being immune to radiation disruption, and the design holds promise for extremely low power dissipation. They can be readily constructed using standard integrated circuit techniques, and can operate at temperatures far exceeding conventional transistors (up to 500ºC).

Nano-mechanical computers have operating speeds on the order of 1 GHz. While this speed is not competitive with traditional CMOS technology, it is sufficient for applications like cell phones, calculators and other micro-controllers, which require robust and low power consumption.

Metal Silicide Nanowires and Methods for Their Production

UW-Madison researchers have developed a simple and unique method of forming single crystal metal silicide nanowires without a metal catalyst.  The free-standing nanowires are grown on a silicon substrate covered with a thin (1-2 nm) layer of silicon oxide via a simple chemical vapor deposition (CVD) process using single or multiple source precursors. Alternatively, the nanowires can be grown on the thin silicon oxide film via a chemical vapor transport (CVT) process using solid metal silicide precursors. The CVT process is particularly applicable for the growth of transition metal silicides for which organometallic precursors are not readily available.

Strain-Engineered Ferroelectric Thin Films

As an alternative to these materials, UW-Madison researchers have developed thin films that have been strain-engineered to greatly enhance their ferroelectric properties for FeRAM and related applications. The invention exploits the fact that enormous strain can develop in a thin film when one material is deposited on another due to factors such as mismatch between the materials’ crystal lattice parameters or thermal expansion between the film and the underlying substrate. The end result is that a thin film under strain will exhibit dramatically different properties than the corresponding unstrained, bulk material.

The researchers showed that by inducing a biaxial compressive strain in a thin film of barium titanate (BaTiO3), they could raise the film’s ferroelectric transition temperature (Tc ) by nearly 500 K and its remnant polarization (Pr) by at least 250 percent over single crystals of BaTiO3. Both a high Tc and a high Pr are needed for FeRAM and electro-optic devices.

Silicon-Based, Single Electron Transistor

UW-Madison researchers have developed a silicon-based, single electron transistor that consists of a source, drain and island.  The SET’s island is composed of a pillar of material that can be biased from the source side, where it collects an electron, to the drain side, where it passes off the electron using the electron’s inherent resonant frequency.  It holds many benefits over currently envisioned SET devices, making it feasible for commercial applications such as switches and signal filters.

Semiconductor Light-Emitting Source for Increased Power Levels

UW–Madison researchers have developed a semiconductor light-emitting source that incorporates antiguided lateral confinement of emitted light and an asymmetric transverse optical waveguiding structure. The semiconductor structure includes a substrate, an active region, optical confinement and cladding layers on opposite sides of the active region and at least one core element at which light emission occurs. Means for providing optical feedback are incorporated in the structure when it is operated as a laser; facets at the longitudinal edges of the structure are formed to be sufficiently antireflective when the semiconductor source operates as an amplifier.