WARF: P140267US01

Energy-Efficient Multiplier Circuitry for GPUs


Nam Sung Kim, Syed Gilani, Michael Schulte

The Wisconsin Alumni Research Foundation (WARF) is seeking commercial partners interested in developing a floating-point system that improves the battery life of portable devices, particularly those featuring energy-intensive graphics processing.
OVERVIEWProcessing images made up of pixel data is an important task of many modern processors, especially in portable devices like cells phones and tablets. Sophisticated image processing often requires floating-point operations that must be repeated for millions of pixels. ‘Floating-point’ is a format for presenting numbers that is versatile and convenient but sacrifices some precision.

The energy consumed by floating-point processors in image-centric applications has a major impact on how long a device can operate between battery chargings.
THE INVENTIONUW–Madison researchers have developed a new circuit system for multiplying floating-point numbers. The system combines a traditional floating-point multiplier with a power-of-two multiplier that works by shifting operations. Substantial power savings may be realized by selectively steering some operands to the power-of-two multiplier.

The different circuits have different advantages. The floating-point multiplier uses more power but is more versatile, while the power-of-two multiplier uses less power but is less versatile.
  • Integration into graphic processing units (GPUs)
  • Particularly useful for smaller mobile devices
  • Provides flexible tradeoff between versatility and power consumption
  • Cuts execution energy by 35 percent
  • Negligible impact on image quality
  • May support ultra-high definition footage
  • Easily implemented in hardware
STAGE OF DEVELOPMENTPromising simulation have been run against industry-standard benchmarks.
Contact Information
For current licensing status, please contact Jeanine Burmania at or 608-960-9846.
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