Semiconductors & Integrated Circuits

Semiconductors & Integrated Circuits Portfolios

Most Recent Inventions

Semiconductor Quantum Dot Computer-Aided Engineering (CAE) Simulation Tool

A Professor of Electrical Engineering at the University of Wisconsin – Platteville has developed a software simulation tool for the computer aided engineering (CAE) of Quantum Dots. The CAE simulation tool accepts input of the QD parameters and then computes and returns the resulting optical and electronic properties. This includes QD structures with an InAs core and a GaAs matrix, and can be extended to any III-IV materials. The CAE tool simulates the most popular pyramidal and half-ellipsoidal QD shapes and can be extended to any arbitrary geometric shape. Compared with the often-incomplete results reported in the literature, this CAE simulation tool returns all possible electronic states within the QD. The CAE simulation results also supported the experimental data for the corresponding QD. The simulation tool currently runs as an application in the COMSOL platform and does not require a supercomputer for calculations and processing.

Carbon Nanotube Vacuum Field Emission Transistor Design for Large-Scale Manufacturing

Inventors from the Department of Engineering Physics at the University of Wisconsin-Platteville have created novel transistors by incorporating etched carbon nanotubes into a planar design that is compatible with existing fabrication techniques. In previous studies by others, aligned carbon nanotube transistors have been demonstrated to achieve saturation current that is 1.9 times higher than those that are silicon-based, at an equivalent charge density. In the optimal embodiment of this invention, carbon nanotubes are aligned and feature precise gaps that act as channels to allow the efficient transport of electrons without the need for a vacuum. The anticipated output of this approach will be nanoscale transistors that resist heat and radiation and operate at low voltage and high frequency. To address current challenges with large-scale VFET manufacturing, this technology offers three advantages – the carbon nanotubes can be prefabricated using methods that are already in place, the selective etching process for creating electron channels uses conventional integrated circuit techniques, and the planar design can integrate with existing wafer-based manufacturing methods.

Vanadium Dioxide Design Solution for Ultrafast Switches

UW–Madison researchers have designed VO2 heterostructures capable of metal-insulator transition near room temperature in practical thin films. The heterostructures are made of multiple bilayers of V02 engineered to have different rutile-to-monoclinic structural transition temperatures.

The bilayers can be incorporated into a variety of electrical switches including capacitors, planar switches and field effect switches, in integrated circuits for memory devices (e.g., CMOS chips) and communication devices. In each of these devices the conversion of the bilayer from its electrically insulating to conducting metallic state (and vice versa) changes the resistance/conductance of the bilayer, thereby modulating current flow or capacitance.

Real-Time Monitoring of Sputtered Thin Films

UW–Madison researchers have developed methods that combine off-axis sputter deposition with in situ RHEED analysis. Using a new multi-gun approach, films are grown and monitored in a single vacuum chamber that houses components of both systems. In this setup the sputtering magnets are used to align the RHEED electron beam. The problem of beam deflection is addressed by applying antisymmetric magnet configurations to the assembly, resulting in a highly predictable bending of the beam.

Most Recent Patents

Next-Generation Electronics: Realizing 2-D Hole Gas in Oxide Materials

UW–Madison researchers have developed the first known method for realizing 2DHG in an oxide material, and for achieving both 2DHG and 2DEG in the same system.

The researchers designed an oxide heterostructure with alternating layers of strontium oxide and titanium dioxide as the base, a polar layer of lanthanum oxide and aluminum oxide, followed by a non-polar layer of strontium oxide and titanium dioxide on the top. The hole gas forms at the interface of the layers on the top, while the electron gas forms at the interface of the layers on the bottom. Both gas layers are thin with highly mobile and concentrated electrons/holes, respectively.

Nitride Based Light-Emitting Diodes with Reduced Efficiency Droop

UW–Madison researchers have developed a new design for enhanced hole injection that uses heavily doped Si as the hole injector layer and Si/GaN tunneling heterojunctions to enable improvements in light emission efficiency. Two types of LED structures incorporating p-Si nanomembranes (NMs) and n-Si NMs as hole injectors were fabricated and characterized both electrically and optically in reference to the control device with conventional structures.

Compared to the reference LED devices, in terms of optical performances the light output power and normalized external-quantum efficiency (EQE) under the same electrical injection current (50 A/cm2) were improved for proposed LED structures with p-Si/GaN and n-Si/GaN tunneling hole injection junction by 29 percent and 100 percent, respectively.

Single-Crystal Halide Perovskite Nanowires with Superior Performance

Metal halide perovskite-based material is emerging as a “superstar” semiconductor material for cost-effective photovoltaic applications. UW–Madison researchers have developed a practical solution growth method for producing single-crystal perovskite nanowires with superior material quality and lasing performance.

Specifically the new method is based on a facile process of low-temperature dissolution of a metal precursor film in a cation precursor solution, followed by recrystallization to form single-crystal perovskite nanostructures such as nanowires, nanorods and nanoplates. Diverse families of metal halide perovskite materials with different cations, anions and dimensionality with different properties can be made to enable high-performance device applications.