Token-Based Cache Coherence Protocol for Shared Memory, Multiprocessor Computer Systems
Inventors: David Wood, Mark Hill, Milo M. K. Martin
The Wisconsin Alumni Research Foundation (WARF) is seeking commercial partners interested in developing a new method for maintaining cache coherence in shared memory multiprocessor computer systems.
Shared memory multiprocessor computers are commonly used to support large-scale software applications such as database servers and scientific simulations. Cache memories provide each processor with rapid access to the shared memory, but require the use of cache coherence protocols to ensure that each cache's contents accurately reflect the contents of the shared memory.
UW-Madison researchers have developed a new method for maintaining cache coherence in shared memory multiprocessor computer systems. The key innovation provided by this technology is that read and write privileges to shared memory blocks are tracked by transferring and counting a set number of “tokens.” The system ensures the correctness of shared memory by allowing a processor to read from a cache block only if the processor possesses one token, and to write to a block only if the processor possesses all the tokens. Because token coherence ensures correctness, designers may aggressively optimize for performance (e.g., by predicting common sharing behaviors) without worrying about introducing errors.
- Maintaining cache coherence in shared memory multiprocessor systems
- Promises to allow faster and easier design verification and validation
- Accelerates program execution by allowing microprocessors to communicate directly with one another without indirections or fixed point ordering
- Because token coherence is not a speculative execution technique, it requires no rollback or recovery mechanism.