Wisconsin Alumni Research Foundation

Semiconductors & Integrated Circuits
Semiconductors Integrated Circuits
Using Block Copolymer Materials to Form Patterns with Isolated or Discrete Features
WARF: P07010US

Inventors: Paul Nealey, Mark Stoykovich, Konstantinos Daoulas, Marcus Muller, Huiman Kang, Juan DePablo

The Wisconsin Alumni Research Foundation (WARF) is seeking commercial partners interested in developing methods for directing the self-assembly of block copolymers on chemically patterned surfaces to form the discrete or isolated features needed for applications such as integrated circuit layouts.
The lithographic process is one of the key enabling technologies of the digital electronics era. Lithography allows hundreds of millions of components to be fabricated on a single chip with pattern features as small as 50 nanometers. However, as electronic devices become smaller and more complex, new materials that can reduce feature sizes are needed. 

Block copolymer materials are one option. Block copolymers self-assemble in a controllable manner to form well-defined nanostructures on the order of a few nanometers. These nanostructures may be difficult or impossible to create by other means, or may be prohibitively expensive to create using traditional lithography.

UW–Madison researchers previously developed methods to form defect-free pattern features by using a chemically patterned surface to direct the self-assembly of block copolymer materials (see WARF reference number P01085US). They also have shown that block copolymer materials can be used to replicate irregular patterns (see WARF reference number P05119US). Because some device components are composed of complex patterns with isolated features, further improvements to these methods are needed before block copolymers can be used to fabricate components such as integrated circuits.
The Invention
The UW–Madison researchers have expanded their previous work to include methods for directing the self-assembly of block copolymers to form patterns with isolated structures such as those used in the fabrication of integrated circuits. They start with a chemically patterned or otherwise activated surface. These surfaces direct the morphology of the overlying block copolymer films to be oriented parallel to the surface in unpatterned regions or in regions with relatively large patterned features and oriented perpendicular to the surface in regions with the smallest patterned features. This allows block copolymers to form complex circuit designs from patterns with isolated features as small as a few nanometers.
  • Photolithography processes for fabricating integrated circuits or hard drives
  • Creation of masks for nanoscale pattern transfer
  • Creation of functional copolymer features such as nanoscale conductive lines
Key Benefits
  • Faster, more efficient and more precise than traditional lithographic techniques
  • May enable the fabrication of smaller electronic devices and/or higher capacity hard drives
  • Capable of replicating isolated and/or irregular features, including corners, angles, t-junctions, spots, isolated lines and rings
  • Provides improved replication of periodic patterns or periodic regions of a pattern
  • Can replicate a discrete feature or features surrounded by a uniform field such as a jog in a periodic set of parallel lines
  • Capable of replicating two or more distinct regions, with the regions differing in the type of features, size and/or pitch
  • Ordering of the block copolymer films may be facilitated through the use of blends of the copolymer material.
  • Self-assembled copolymers may be used as masks or resists for further semiconductor processing.
Stage of Development
This technology was successfully used to pattern a complete set of the isolated feature geometries considered necessary for nanomanufacturing by representatives of microelectronics companies.
Additional Information
Related Intellectual Property
For current licensing status, please contact Emily Bauer at [javascript protected email address] or 608-960-9842
Pattern geometries needed for pattern transfer and integrated circuit fabrication that can be created using these methods.