Wisconsin Alumni Research Foundation

Technology

COMPUTER SYSTEM WITH INSTRUCTION PRE-SENDING

UW-Madison researchers have developed a system for pre-sending memory blocks to the higher levels of the memory hierarchy without the need for accurate and time-precise knowledge of processor micro-ar...
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Gurindar Sohi, Shyam Murthy | P230167US01

Technology

Visual Privacy Protection System

A visual privacy system unilaterally blocks rolling shutter cameras by providing a periodically interrupted ambient light source imposing bright and dark bands on the image yet at a frequency impercep...
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Xinyu Zhang, Chi Zhang, Shilin Zhu | P170301US01

Technology

High Density Content Addressable Memory

An associative memory that can be integrated with standard computer memory flexibly reduces its parallelism to match the memory bus speed thereby providing substantial increases in memory density poss...
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Jing Li | P160004US01

Technology

Polarization Rotating Phased Array Element

A phase shifter includes a first dielectric layer, a switch mounted to the first dielectric layer, a conductive layer mounted to the first dielectric layer, a second dielectric layer mounted to the co...
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Nader Behdad, Zhe Yang, John Booske, Hung Luyen | P170061US01

Technology

Wireless Vibrometer With Antenna Array

A wireless vibrometer employs an antenna array to significantly boost the signal-to-noise ratio of faint received signals twin small objects vibrating at acoustic frequencies. This technique may be us...
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Xinyu Zhang, Teng Wei, Shu Wang, Anfu Zhou | P160023US01

Technology

Multiple Band Polarization Rotating Phased Array Element

A multiple band phase shifter includes a first dielectric layer, a conductive layer, a second dielectric layer, and for each central operating frequency of a plurality of central operating frequencies...
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Nader Behdad, John Booske, Hung Luyen, Zongtang Zhang | P190115US01

Technology

Memory Processing Core Architecture

Aspects of the present invention provide a memory system comprising a plurality of stacked memory layers, each memory layer divided into memory sections, wherein each memory section connects to a neig...
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Karthikeyan Sankaralingam, Jaikrishnan Menon, Lorenzo De Carli | P140414US02

WARF