Wisconsin Alumni Research Foundation

Information Technology
Information Technology
Method Of Estimating Program Speed-Up In Highly Parallel Architectures Using Static Analysis
WARF: P160178US01

Inventors: Karthikeyan Sankaralingam, Newsha Ardalani, Urmish Thakker

The Invention
The amount of speed-up that can be obtained by optimizing the program to run on a different architecture is determined by static measurements of the program. Multiple such static measurements are processed by a machine learning system after being discretized to alter their accuracy vs precision. Static analysis requires less analysis overhead and permits analysis of program portions to optimize allocation of porting resources on a large program.
Additional Information
For More Information About the Inventors
For current licensing status, please contact Jeanine Burmania at [javascript protected email address] or 608-960-9846