Wisconsin Alumni Research Foundation

Semiconductors & Integrated Circuits
Semiconductors Integrated Circuits
Fault Tolerant Charge Parity Qubit
WARF: P180262US02

Inventors: Lev Ioffe, Lara Faoro, Robert McDermott

The Invention
A quantum computer architecture employs logical qubits that are constructed from a concatenation of doubly periodic Josephson junction circuits. The series concatenation of the doubly periodic Josephson junction circuits provides exponential robustness against local noise. It is possible to perform discrete Clifford group rotations and entangling operations on the logical qubits without leaving the protected state.
Additional Information
For More Information About the Inventors
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