Leveraging advances in power semiconducting technology
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UW-Madison researchers have developed a balanced inverter design to achieve near zero common-mode (CM) voltage and leverage advances in power semiconducting technology across the automotive and aerospace sectors. By eliminating the CM voltage of motor drives, their patented topology reduces the EMI filter requirements and bearing current damage to support next-generation power electronics.
With the advances in wide bandgap devices such as silicon carbide (SiC) and gallium nitride (GaN), CM voltage-related issues in electric vehicles and motor drives – such as electromagnetic interference (EMI) emission and bearing current damage – will become progressively significant due to high switching speeds. In industry, passive CM EMI filters are widely used to suppress these issues, but standard filters are bulky, expensive and lossy.
The novel topology splits one of the switches on each phase-leg of a conventional inverter into two half-voltage rated switches, and creates two complementary sets of balanced three-phase output voltages, whose CM voltages cancel each other in the driven motor. The balanced inverter topology does not involve filter components, modification of the modulation strategy, or an increase of the total device rating.
The Sarlioglu team have simulations and calculations indicating 100 percent reduction of CM voltage peak amplitude, compared to a conventional inverter. The team has an engineering prototype and experimental data showing up to a 40 dB reduction in CM EMI emission. Active work is being done to advance a prototype and optimize the design.
Read more about Bulent Sarlioglu, an inventor on more than 30 U.S. and international patents, many of which were granted while he worked at Honeywell (2000-2011). Sarlioglu’s award-winning research in the field of electrical machines, power circuits and compressors has facilitated transitions from conventional to more electric, high-speed motor drives. It has also led to measurable reductions in fossil fuel consumption in the aerospace industry and declines in greenhouse gas emissions. He was named a fellow of the National Academy of Inventors in 2021 and a fellow of IEEE in 2022.
Analysis of EMI Source in the Balanced Inverter with Desynchronization of Gate Signals
An Investigation into the Effect of the Gate Drive Resistance on the Performance of the Balanced Inverter
Tian, Pengkun, Feida Chen, Thomas M. Jahns, and Bulent Sarlioglu, “An Investigation into the Effect of the Gate Drive Resistance on the Performance of the Balanced Inverter,” 2022 IEEE Energy Conversion Congress and Exposition (ECCE), Detroit, MI, USA, 2022, pp. 1-8, DOI: 10.1109/ECCE50734.2022.9947383.
Han, Di, et al. “Achieving zero common mode voltage generation in a balanced inverter with neutral-point diode-clamping.” 2017 IEEE Energy Conversion Congress and Exposition (ECCE). IEEE, 2017. DOI: https://doi.org/10.1109/ECCE.2017.8096749
Tian, Pengkun, Thomas M. Jahns, and Bulent Sarlioglu. “Analysis of EMI Source in the Balanced Inverter with Desynchronization of Gate Signals.” 2021 IEEE Transportation Electrification Conference & Expo (ITEC). IEEE, 2021. DOI: https://doi.org/10.1109/ITEC51675.2021.9490142
Han, Di, Casey T. Morris, and Bulent Sarlioglu. “Common-mode voltage cancellation in PWM motor drives with balanced inverter topology.” IEEE Transactions on Industrial Electronics 64.4 (2016): 2683-2688. DOI: https://doi.org/10.1109/TIE.2016.2633234
Han, Di, et al. “Comparative performance evaluation of common mode voltage reduction three-phase inverter topologies.” 2018 IEEE Applied Power Electronics Conference and Exposition (APEC). IEEE, 2018. DOI: https://doi.org/10.1109/APEC.2018.8341387
Han, Di, et al. “New method for common mode voltage cancellation in motor drives: Concept, realization, and asymmetry influence.” IEEE Transactions on Power Electronics 33.2 (2017): 1188-1201. DOI: https://doi.org/10.1109/TPEL.2017.2688370
Tian, Pengkun, Woongkul Lee, and Bulent Sarlioglu. “Study of performance of balanced inverter under influence of power loop stray inductance.” 2020 IEEE Transportation Electrification Conference & Expo (ITEC). IEEE, 2020. DOI: https://doi.org/10.1109/ITEC48692.2020.9161759
This technology is part of the WARF Accelerator program.